High density memory devices may suffer from many memory faults due to the increasingly small cell pitch of modern process technology. Discarding high density memory devices that have these faults is unacceptable in terms of manufacturing yield. Solutions to these small and repairable numbers of memory faults have historically required large areas of each high density memory device chip memory array to be pre-allocated to provide redundancy for the memory faults. This approach is costly both in terms of space lost in memory arrays and density when encountering a memory fault.
Systems and methods are needed that can provide redundancy for faults within high density memory devices, while minimizing space required for redundancy and allowing effective control of redundancy assignment.